Integration process to form microelectronic or micromechanical structures
US9755016B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2016 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Apr 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to transferring, in one exposure, a single-mask feature to form two features on an underlying material. Specifically, a doubled walled structure (i.e. a center opening flanked by adjacent openings) is formed. Advantageously, the openings may be sub-resolution openings. The center opening may be a line flanked by two other lines. The center opening may be circular and surrounded by an outer ring, thus forming a double wall ring structure. In an electronic fuse embodiment, the double wall ring structure is a via filled with a conductor that contacts a lower and upper level metal. In deep trench embodiment, the double wall ring structure is a deep trench in a semiconductor substrate filled with insulating material. In such a way the surface area of the trench is increased thereby increasing capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.