Method of fabricating a semiconductor device
US9755057B1 · kind B1 · utility
1Cited by
1References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 28, 2016 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Jul 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device is disclosed. A substrate is provided. A dummy gate stack is formed on the substrate. The dummy gate stack includes a gate dielectric layer and an amorphous silicon dummy gate on the gate dielectric layer. The amorphous silicon dummy gate is transformed into a nano-crystalline silicon dummy gate. A spacer is formed on a sidewall of the nano-crystalline silicon dummy gate. A source/drain region is formed in the substrate on either side of the dummy gate stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.