Cascode voltage generating circuit and method
US9755632B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 13, 2015 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Aug 13, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/102
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A cascode voltage generating circuit and method are provided. The circuit includes four switching elements. In a high voltage operation mode, the first and second switching elements, respectively, couple a first intermediate voltage input node to a first intermediate voltage output node, and a second intermediate voltage input node to a second intermediate voltage output node. In a low voltage operation mode, the third switching element couples the first and second intermediate voltage input nodes to a ground reference voltage level, and the fourth switching element couples the first and second intermediate voltage output nodes to a supply voltage level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.