Strained channel field effect transistor
US9761666B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2011 |
| Grant date | Sep 12, 2017 |
| Priority date | — |
| Expiry date | Sep 15, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
The present disclosure provides a semiconductor device with a strained SiGe channel and a method for fabricating such a device. In an embodiment, a semiconductor device includes a substrate including at least two isolation features, a fin substrate disposed between and above the at least two isolation features, and an epitaxial layer disposed over exposed portions of the fin substrate. According to one aspect, the epitaxial layer may be disposed over a top surface and sidewalls of the fin substrate. According to another aspect, the fin substrate may be disposed substantially completely above the at least two isolation features.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.