Intermediate layer for copper structuring and methods of formation thereof
US9773736B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2015 |
| Grant date | Sep 26, 2017 |
| Priority date | — |
| Expiry date | Jan 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a metallization layer over a semiconductor substrate includes depositing a blanket layer of a diffusion barrier liner over an inter level dielectric layer, and depositing a blanket layer of an intermediate layer over the diffusion barrier liner. A blanket layer of a power metal layer including copper is deposited over the intermediate layer. The intermediate layer includes a solid solution of a majority element and copper. The intermediate layer has a different etch selectivity from the power metal layer. After depositing the power metal layer, structuring the power metal layer, the intermediate layer, and the diffusion barrier liner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.