Methods and apparatus for three-dimensional NAND non-volatile memory devices with side source line and mechanical support
US9780112B2 · kind B2 · utility
8Cited by
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10Claims
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Key dates
| Filing date | Oct 26, 2015 |
| Grant date | Oct 3, 2017 |
| Priority date | — |
| Expiry date | Oct 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
Abstract
A method of fabricating a monolithic three dimensional memory structure is provided. The method includes forming a stack of alternating word line and dielectric layers above a substrate, forming a source line above the substrate, forming a memory hole extending through the alternating word line and dielectric layers and the source line, and forming a mechanical support element on the substrate adjacent to the memory hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.