Semiconductor structure including a transistor including a gate electrode region provided in a substrate and method for the formation thereof
US9786657B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2016 |
| Grant date | Oct 10, 2017 |
| Priority date | — |
| Expiry date | Apr 4, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
A semiconductor structure includes a bulk semiconductor substrate, an electrically insulating layer over the substrate, an active layer of semiconductor material over the electrically insulating layer and a transistor. The transistor includes an active region, a gate electrode region and an isolation junction region. The active region is provided in the active layer of semiconductor material and includes a source region, a channel region and a drain region. The gate electrode region is provided in the bulk semiconductor substrate and has a first type of doping. The isolation junction region is formed in the bulk semiconductor substrate and has a second type of doping opposite the first type of doping. The isolation junction region separates the gate electrode region from a portion of the bulk semiconductor substrate other than the gate electrode region that has the first type of doping.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.