Air gap and air spacer pinch off
US9786760B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2016 |
| Grant date | Oct 10, 2017 |
| Priority date | — |
| Expiry date | Sep 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments are directed to a method of forming a semiconductor device and resulting structures having an air spacer between a gate and a contact by forming a gate on a substrate and over a channel region of a semiconductor fin. A contact is formed on a doped region of the substrate such that a space between the contact and the gate defines a trench. A first dielectric layer is formed over the gate and the contact such that the first dielectric layer partially fills the trench. A second dielectric layer is formed over the first dielectric layer such that an air spacer forms in the trench between the gate and the contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.