Self-aligned metal cut and via for back-end-of-line (BEOL) processes for semiconductor integrated circuit (IC) fabrication, and related processes and devices
US9793164B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2015 |
| Grant date | Oct 17, 2017 |
| Priority date | — |
| Expiry date | May 2, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/461
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Self-aligned metal cut and via for Back-End-Of-Line (BEOL) processes for semiconductor integrated circuit (IC) fabrication, and related processes and devices, is disclosed. In this manner, mask placement overlay requirements can be relaxed. This relaxation can be multiples of that allowed by conventional BEOL techniques. This is enabled through application of different fill materials for alternating lines in which a conductor will later be placed. With these different fill materials in place, a print cut and via mask is used, with the mask allowed to overlap other adjacent fill lines to that of the desired line. Etching is then applied that is selective to the desired line but not adjacent lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.