Structure of memory cell with asymmetric cell structure and method for fabricating the same
US9793278B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2016 |
| Grant date | Oct 17, 2017 |
| Priority date | — |
| Expiry date | Apr 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A memory cell disposed on a substrate has a first gate structure and a second gate structure. The memory cell includes a first heavily doped region adjacent to an outer side of the first gate structure. Further, a first lightly doped drain (LDD) region with a first type dopant is between the first heavily doped region and the outer side of the first gate structure. A pocket doped region with a second type dopant is overlapping with the first LDD region. The second type dopant is opposite to the first type dopant in conductive type. A second heavily doped region is adjacent to an outer side of the second gate structure, opposite to the first heavily doped region. A second LDD region with the first type dopant is disposed between the first gate structure and the second gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.