Semiconductor device and method for manufacturing same
US9793293B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2017 |
| Grant date | Oct 17, 2017 |
| Priority date | — |
| Expiry date | Mar 17, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a stacked body including a plurality of electrode layers stacked with an insulator interposed; a columnar portion provided in the stacked body and extending in a stacking direction of the electrode layers; and a first separation region provided in the stacked body and extending in a first direction. The stacked body includes a memory cell array and a staircase portion arranged in the first direction, the memory cell array including memory cells provided along the columnar portion, and the staircase portion including a plurality of terraces arranged along the first direction. The first separation region includes a first portion and a second portion in the staircase portion, the first portion having a first width in a second direction crossing the first direction, and the second portion having a second width in the second direction. The second width is narrower than the first width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.