Patent · US Active

Integrated circuit including a dummy gate structure and method for the formation thereof

US9793372B1 · kind B1 · utility

12Cited by
0References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 25, 2016
Grant dateOct 17, 2017
Priority date
Expiry dateMay 25, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/201
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit includes a first transistor, a second transistor and a dummy gate structure. The first transistor includes a first gate structure. The first gate structure includes a first gate insulation layer including a high-k dielectric material and a first gate electrode. The second transistor includes a second gate structure. The second gate structure includes a second gate insulation layer including the high-k dielectric material and a second gate electrode. The dummy gate structure is arranged between the first transistor and the second transistor and substantially does not include the high-k dielectric material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.