Patent · US Active

Semiconductor device

US9805783B2 · kind B2 · utility

98Cited by
6References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 30, 2016
Grant dateOct 31, 2017
Priority date
Expiry dateSep 30, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C29/846
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC; a plurality of word lines WL each coupled to a corresponding one of the plurality of memory cells MC; and a control circuit that intermittently monitors accesses to the plurality of word lines WL, stores/erases some captured row-addresses in a first number of registers, and detects, by comparison with stored addresses, in response to a first number of accesses to one of the word lines WL in a first period of time. According to the present invention, access histories can be precisely analyzed by a small-scale circuit configuration, and measures against, for example, the Row Hammer problem, etc. can be taken.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.