Semiconductor package and manufacturing method thereof
US9809446B1 · kind B1 · utility
1Cited by
1References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 9, 2016 |
| Grant date | Nov 7, 2017 |
| Priority date | — |
| Expiry date | May 9, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.