Concurrent read and write operations in a serial flash device
US9812200B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2015 |
| Grant date | Nov 7, 2017 |
| Priority date | — |
| Expiry date | May 22, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of controlling an NVM device can include: (i) receiving, by an interface, a write command from a host; (ii) beginning execution of a write operation on a first array plane of a memory array in response to the write command, where the memory array includes a plurality of NVM cells arranged in a plurality of array planes; (iii) receiving, by the interface, a read command from the host; (iv) suspending the write operation in response to detection of the read command during execution of the write operation; (v) beginning execution of a read operation on a second array plane in response to the read command; and (vi) resuming the write operation after the read operation has at least partially been executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.