Semiconductor package with top side cooling heat sink thermal pathway
US9812373B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2015 |
| Grant date | Nov 7, 2017 |
| Priority date | — |
| Expiry date | Dec 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic module includes a semiconductor package including a semiconductor chip and an electrically insulating encapsulation body encapsulating the semiconductor chip, the encapsulation body completely covering a second main face and four side faces of the semiconductor chip, wherein a first main face of the semiconductor chip that is opposite the first main face is exposed from the encapsulation body, a heat spreader attached to the semiconductor package, the heat spreader completely covering the first main face of the semiconductor chip, and an electrically insulating layer disposed on the heat spreader remote from the semiconductor package. The electrically insulating layer is completely separated from the semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.