Patent · US Active

FIFO load instruction

US9823928B2 · kind B2 · utility

4Cited by
10References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 30, 2011
Grant dateNov 21, 2017
Priority date
Expiry dateNov 20, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/30043
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An instruction identifies a register and a memory location. Upon execution of the instruction by a processor, an item is loaded from the memory location and a shift and insert operation is performed to shift data in the register and to insert the item into the register.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.