Flipped die stack
US9825002B2 · kind B2 · utility
1Cited by
175References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2016 |
| Grant date | Nov 21, 2017 |
| Priority date | — |
| Expiry date | Jul 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic assembly includes a stack of semiconductor chips each having a front surface defining a respective plane of a plurality of planes. A chip terminal may extend from a contact at a front surface of each chip in a direction towards the edge surface of the respective chip. The chip stack is mounted to substrate at an angle such that edge surfaces of the chips face a major surface of the substrate that defines a second plane that is transverse to, i.e., not parallel to the plurality of parallel planes. An electrically conductive material electrically connects the chip terminals with corresponding substrate contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.