Methods and systems for generation and editing of parameterized figure group
US9830417B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2016 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Jul 7, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic circuit design system for generating a programmable set of figures of an electronic circuit layout is provided. The system includes a non-transitory machine-readable layout database storing an electronic circuit layout of an electronic circuit design. The system further includes a circuit designer interface for viewing representations of the electronic circuit layout on a display unit and receiving inputs by one or more electronic circuit designers. The system further includes a processor configured to generate a figure group in the electronic circuit layout of the electronic circuit design; generate one or more templates comprising one or more parameters and a programming language code; and generate a parameterized figure group by associating the one or more templates to the figure group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.