Devendra Deshpande
10Patents
4h-index
20Co-inventors
56Inventor score
Filing activity: May 9, 2008 → Oct 7, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7917877B2 | System and method for circuit schematic generation | Physics | 183 | Active |
| US9830417B1 | Methods and systems for generation and editing of parameterized figure group | Physics | 7 | Active |
| US9842183B1 | Methods and systems for enabling concurrent editing of electronic circuit layouts | Physics | 7 | Active |
| US10223495B1 | System and method for tuning a graphical highlight set to improve hierarchical layout awareness and editing | Physics | 5 | Active |
| US10354034B1 | System and method for tuning a graphical highlight set to improve hierarchical layout editing | Physics | 2 | Active |
| US10671793B1 | Editing of layout designs for fixing DRC violations | Physics | 2 | Active |
| US11790149B1 | System and method for tracing nets across multiple fabrics in an electronic design | Physics | 0 | Active |
| US11017145B1 | System and method for repeating a synchronized set of layout geometries | Physics | 0 | Active |
| US10963616B1 | Systems and methods of aligning sets of wires with minimum spacing rules | Electricity | 0 | Active |
| US12223244B1 | System and method for interactive visualization of placement of objects in an electronic design | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.