Structure and method to achieve compressively strained Si NS
US9831323B2 · kind B2 · utility
7Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2016 |
| Grant date | Nov 28, 2017 |
| Priority date | — |
| Expiry date | Sep 15, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/465
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stack for a semiconductor device and a method for making the stack are disclosed. The stack includes a plurality of sacrificial layers in which each sacrificial layer has a first lattice parameter; and at least one channel layer that has a second lattice parameter in which the first lattice parameter is less than or equal to the second lattice parameter, and each channel layer is disposed between and in contact with two sacrificial layers and includes a compressive strain or a neutral strain based on a difference between the first lattice parameter and the second lattice parameter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.