Systems and methods for modeling memory access behavior and memory traffic timing behavior
US9846627B2 · kind B2 · utility
5Cited by
17References
26Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 15, 2016 |
| Grant date | Dec 19, 2017 |
| Priority date | — |
| Expiry date | Feb 15, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for modeling memory access behavior and memory traffic timing behavior are disclosed. According to an aspect, a method includes receiving data indicative of memory access behavior resulting from instructions executed on a processor. The method also includes determining a statistical profile of the memory access behavior, the profile including tuple statistics of memory access behavior. Further, the method includes generating a clone of the executed instructions based on the statistical profile for use in simulating the memory access behavior.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.