Semiconductor device with plated lead frame, and method for manufacturing thereof
US9847235B2 · kind B2 · utility
1Cited by
3References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2014 |
| Grant date | Dec 19, 2017 |
| Priority date | — |
| Expiry date | Feb 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A carrier substrate having a plurality of receptacles each for receiving and carrying a semiconductor chip is provided. Semiconductor chips are arranged in the receptacles, and metal is plated in the receptacles to form a metal structure on and in contact with the semiconductor chips. The carrier substrate is cut to form separate semiconductor devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.