Semiconductor structure including a first transistor at a semiconductor-on-insulator region and a second transistor at a bulk region and method for the formation thereof

US9847347B1 · kind B1 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Elliot John Smith · Dresden, DE
• Nilesh Kenkare · Dresden, DE
• Nigel Chan · Sunnyvale, US

Key dates

• Filing date: Nov 7, 2016
• Grant date: Dec 19, 2017
• Expiry date: Nov 7, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D87/00
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor structure includes a substrate, a first transistor and a second transistor. The substrate includes a semiconductor-on-insulator region and a bulk region. The first transistor is provided at the semiconductor-on-insulator region and includes a first gate structure and a first channel region provided in a layer of semiconductor material over a layer of electrically insulating material. The second transistor is provided at the bulk region and includes a second gate structure and a second channel region provided in a bulk semiconductor material. A plane of an interface between the second channel region and the second gate structure is not above a plane of an interface between the bulk semiconductor material and the layer of electrically insulating material in the semiconductor-on-insulator region. A height of the second gate structure is greater than a height of the first gate structure.