Fabrication of integrated circuit structures for bipolor transistors
US9847408B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2016 |
| Grant date | Dec 19, 2017 |
| Priority date | — |
| Expiry date | Jun 21, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/294
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods of according to the present disclosure can include: providing a substrate including: a first semiconductor region, a second semiconductor region, and a trench isolation (TI) laterally between the first and second semiconductor regions; forming a seed layer on the TI and the second semiconductor region of the substrate, leaving the first semiconductor region of the substrate exposed; forming an epitaxial layer on the substrate and the seed layer, wherein the epitaxial layer includes: a first semiconductor base material positioned above the first semiconductor region of the substrate, and an extrinsic base region positioned above the seed layer; forming an opening within the extrinsic base material and the seed layer to expose an upper surface of the second semiconductor region; and forming a second semiconductor base material in the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.