Array of cross point memory cells individually comprising a select device and a programmable device
US9853211B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2015 |
| Grant date | Dec 26, 2017 |
| Priority date | — |
| Expiry date | Jul 24, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/841
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of forming an array of cross point memory cells comprises forming spaced conductive lower electrode pillars for individual of the memory cells being formed along and elevationally over spaced lower first lines. Walls cross elevationally over the first lines and between the electrode pillars that are along the first lines. The electrode pillars and walls form spaced openings between the first lines. The openings are lined with programmable material of the memory cells being formed to less-than-fill the openings with the programmable material. Conductive upper electrode material is formed over the programmable material within remaining volume of the openings and spaced upper second lines are formed which cross the first lines elevationally over the conductive upper electrode material that is within the openings. A select device is between the lower electrode pillar and the underlying first line or is between the conductive upper electrode material and the overlying second line for the individual memory cells. Aspects of the invention include an array of cross point memory cells independent of method of manufacture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.