Maintaining order with parallel access data streams
US9858190B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2015 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | Feb 13, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Maintaining store order with high throughput in a distributed shared memory system. A request is received for a first ordered data store and a coherency check is initiated. A signal is sent that pipelining of a second ordered data store can be initiated. If a delay condition is encountered during the coherency check for the first ordered data store, rejection of the first ordered data store is signaled. If a delay condition is not encountered during the coherency check for the first ordered data store, a signal is sent indicating a readiness to continue pipelining of the second ordered data store.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.