Semiconductor device having a chip under package
US9859251B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2016 |
| Grant date | Jan 2, 2018 |
| Priority date | — |
| Expiry date | Feb 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19104
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device package includes an electronic component and an electrical interconnect. The electronic component is attached to the electrical interconnect. The electrical interconnect is configured to electrically couple the electronic component to external terminals of the semiconductor device package. The electrical interconnect has a first main face facing the electronic component and a second main face opposite the first main face. The semiconductor device package further includes a first semiconductor chip facing the second main face of the electrical interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.