Patent · US Active

Reduction of solder interconnect stress

US9865557B1 · kind B1 · utility

1Cited by
12References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 30, 2016
Grant dateJan 9, 2018
Priority date
Expiry dateAug 30, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3512
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An electrical contact upon an interposer and/or upon a processing device includes a minor axis and a major axis. The contact is positioned such that the major axis is generally aligned with the direction of expansion of the interposer and/or the processing device. The electrical contact may further be positioned within a power/ground or input/output (I/O) region of the interposer and/or processing device. The electrical contact may further be positioned within a center region that is surrounded by a perimeter region of the interposer and/or the processing device. The dimensions or aspect ratios of major and minor axes of neighboring electrical contacts within an electrical contact grid may differ relative thereto. Further, the angle of respective major and minor axes of neighboring electrical contacts within the electrical contact grid may differ relative thereto.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.