Single and double diffusion breaks on integrated circuit products comprised of FinFET devices
US9865704B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2016 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | May 31, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/797
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One illustrative integrated circuit product disclosed herein includes, among other things, a plurality of FinFET devices, each of which comprises a gate structure comprising a high-k gate insulation material and at least one layer of metal, a single diffusion break (SDB) isolation structure positioned in a first trench defined in a semiconductor substrate between first and second active regions, the SDB isolation structure comprising the high-k insulating material and the at least one layer of metal, and a double diffusion break (DDB) isolation structure positioned in a second trench defined in a semiconductor substrate between third and fourth active regions, the DDB isolation structure comprising a first insulating material that substantially fills the second trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.