Semiconductor device having a gap defined therein
US9871121B2 · kind B2 · utility
22Cited by
9References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2014 |
| Grant date | Jan 16, 2018 |
| Priority date | — |
| Expiry date | Jul 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/679
Abstract
In a particular embodiment, a method includes forming a first spacer structure on a dummy gate of a semiconductor device and forming a sacrificial spacer on the first spacer structure. The method also includes etching a structure of the semiconductor device to create an opening, removing the sacrificial spacer via the opening, and depositing a material to close to define a gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.