Bipolar semiconductor device with sub-cathode enhancement regions

US9871128B2 · kind B2 · utility

Assignee

• Infineon Technologies Americas Corp. · US

Inventors

• Florin Udrea · Cambridge, GB
• Gianluca Camuso · Cambridge, GB
• Alice Pei-Shan Hsieh · Cambridge, GB
• Chiu Ng · El Segundo, US
• Yi Tang · Torrance, US
• Rajeev Krishna Vytla · Los Angeles, US
• Canhua Li · Torrance, US

Key dates

• Filing date: Mar 18, 2016
• Grant date: Jan 16, 2018
• Expiry date: Mar 18, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/117

Abstract

There are disclosed herein various implementations of a bipolar semiconductor device with sub-cathode enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type opposite the first conductivity type. The bipolar semiconductor device also includes first and second depletion trenches, each having a depletion electrode. In addition, the bipolar semiconductor device includes a first control trench situated between the first and second depletion trenches, the first control trench extending into the drift region and being adjacent to cathode diffusions. An enhancement region having the first conductivity type is localized in the drift region between the first control trench and one or both of the first and second depletion trenches. In one implementation, the bipolar semiconductor device may be an insulated-gate bipolar transistor (IGBT).