III-V semiconductor layers, III-V semiconductor devices and methods of manufacturing thereof
US9876088B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 23, 2016 |
| Grant date | Jan 23, 2018 |
| Priority date | — |
| Expiry date | Nov 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of forming a Group III-V semiconductor layer on a Si substrate, a first source gas containing a Group V element is supplied to a surface of the Si substrate while heating the substrate at a first temperature, thereby terminating the Si surface with the Group V element. Then, a second source gas containing a Group III element is supplied to the surface while heating the substrate at a second temperature, thereby forming a nucleation layer directly on the surface of the Si substrate. After the nucleation layer is formed, the supply of the second source gas is stopped and the substrate is annealed at a third temperature while the first source gas being supplied, thereby forming a seed layer. After the annealing, the second source gas is supplied while heating the substrate at a fourth temperature, thereby forming a body III-V layer semiconductor on the seed layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.