Method for making a transistor in a stack of superimposed semiconductor layers
US9876121B2 · kind B2 · utility
4Cited by
1References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2016 |
| Grant date | Jan 23, 2018 |
| Priority date | — |
| Expiry date | Mar 15, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making a transistor in which:
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.