Matrix processing apparatus
US9880976B2 · kind B2 · utility
3Cited by
9References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2016 |
| Grant date | Jan 30, 2018 |
| Priority date | — |
| Expiry date | Dec 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and apparatus, including a system for transforming sparse elements into a dense matrix. The system includes a data fetch unit that includes a plurality of processors, the data fetch unit configured to determine, based on identifications of the subset of the particular sparse elements, a processor designation for fetching the subset of the particular sparse elements. The system includes a concatenation unit configured to generate an output dense matrix based on a transformation that is applied to the sparse elements fetched by the data fetch unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.