Rahul Nagarajan
21Patents
3h-index
10Co-inventors
52Inventor score
Filing activity: Feb 5, 2016 → Mar 6, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9798701B2 | Matrix processing apparatus | Physics | 9 | Active |
| US9805001B2 | Matrix processing apparatus | Physics | 7 | Active |
| US9898441B2 | Matrix processing apparatus | Electricity | 5 | Active |
| US10417303B2 | Matrix processing apparatus | Physics | 3 | Active |
| US9880976B2 | Matrix processing apparatus | Electricity | 3 | Active |
| US11222258B2 | Load balancing for memory channel controllers | Physics | 2 | Active |
| US11651209B1 | Accelerated embedding layer computations | Physics | 2 | Active |
| US10719575B2 | Matrix processing apparatus | Physics | 2 | Active |
| US9772974B2 | Matrix processing apparatus | General | 0 | Revoked |
| US12340227B2 | Sparse SIMD cross-lane processing unit | Physics | 0 | Active |
| US12282853B2 | Accelerated embedding layer computations | Physics | 0 | Active |
| US11948086B2 | Accelerated embedding layer computations | Physics | 0 | Active |
| US11966745B2 | Sparse SIMD cross-lane processing unit | Physics | 0 | Active |
| US11977499B2 | Streaming transfers and ordering model | Physics | 0 | Active |
| US12007913B2 | On-chip interconnect for memory channel controllers | Physics | 0 | Active |
| US9772973B2 | Matrix processing apparatus | General | 0 | Revoked |
| US11366877B2 | Matrix processing apparatus | Physics | 0 | Active |
| US11972263B2 | Cooperative instruction prefetch on multicore system | Physics | 0 | Active |
| US12393529B2 | Streaming transfers and ordering model | Physics | 0 | Active |
| US12353887B2 | Programmable accelerator for data-dependent, irregular operations | Physics | 0 | Active |
| US12210402B2 | Method to detect silent data corruption (SDC) for SIMD compute units | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.