Method of fabricating semiconductors
US9881795B2 · kind B2 · utility
0Cited by
4References
15Claims
0Family size
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Key dates
| Filing date | Oct 7, 2016 |
| Grant date | Jan 30, 2018 |
| Priority date | — |
| Expiry date | Oct 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor includes applying a planarization material to a substrate and forming an opening in the planarization material. The opening is filled with polysilicon. A plurality of etching modulation sequences are applied to the substrate, each of the etching modulation sequences including: applying a first etching process to the substrate, wherein the first etching process is more selective to polysilicon than the planarization material; and applying a second etching process to the substrate, wherein the second etching process is more selective to the planarization material than the polysilicon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.