Method of forming semiconductor structure with horizontal gate all around structure
US9881993B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2014 |
| Grant date | Jan 30, 2018 |
| Priority date | — |
| Expiry date | Feb 4, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device having a horizontal gate all around structure on a bulk substrate is provided. The method comprises forming a plurality of fins on a bulk substrate wherein each fin comprises a vertical slice of substrate material and a plurality of channel layers above the vertical slice of substrate material. The plurality of channel layers includes a top channel layer above a bottom channel layer. Each channel layer comprises a first sublayer of removable semiconductor material overlaid by a second sublayer of semiconductor material. The method further comprises providing shallow trench isolation (STI) material between the vertical slices of the bulk substrate in the plurality of fins, depositing poly material around a central portion of the plurality of fins, forming source and drain regions, and forming an interlayer dielectric layer (ILD0). The method also comprises removing the poly material, forming a plurality of channels from the channel layers, and forming a gate around the channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.