Integrated circuit substrate and method for manufacturing the same
US9899277B2 · kind B2 · utility
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17Claims
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Key dates
| Filing date | Feb 19, 2016 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Feb 19, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a wafer. The method includes providing a wafer and testing the wafer. Based on a test result, a substance is selectively provided on the wafer to obtain an altered wafer that has at least one selected portion altered. The method includes forming a structural layer over the altered wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.