Inventor · Wernberg, AT

Martin Mischitz

22Patents
3h-index
36Co-inventors
59Inventor score

Filing activity: Feb 11, 2010 → Oct 1, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US9673096B2 Method for processing a semiconductor substrate and a method for processing a semiconductor wafer Electricity 21 Active
US9844134B2 Device including a metallization layer and method of manufacturing a device Electricity 9 Active
US9620466B1 Method of manufacturing an electronic device having a contact pad with partially sealed pores Electricity 3 Active
US9190322B2 Method for producing a copper layer on a semiconductor body using a printing process Electricity 2 Active
US10580753B2 Method for manufacturing semiconductor devices Electricity 2 Active
US9929111B2 Method of manufacturing a layer structure having partially sealed pores Electricity 2 Active
US9368436B2 Source down semiconductor devices and methods of formation thereof Electricity 1 Active
US8704514B2 Current sensor including a sintered metal layer Electricity 1 Active
US9768023B1 Method for structuring a substrate Electricity 0 Active
US9818602B2 Method of depositing a resin material on a semiconductor body with an inkjet process Chemistry; Metallurgy 0 Active
US9911686B2 Source down semiconductor devices and methods of formation thereof Electricity 0 Active
US9899277B2 Integrated circuit substrate and method for manufacturing the same Electricity 0 Active
US11329021B2 Method for fabricating a semiconductor device comprising a paste layer and semiconductor device Electricity 0 Active
US9177790B2 Inkjet printing in a peripheral region of a substrate Electricity 0 Active
US10340197B2 Integrated circuit substrate having configurable circuit elements Electricity 0 Active
US10515910B2 Semiconductor device having a porous metal layer and an electronic device having the same Electricity 0 Active
US9640419B2 Carrier system for processing semiconductor substrates, and methods thereof Electricity 0 Active
US9793119B2 Method for structuring a substrate using a protection layer as a mask Electricity 0 Active
US10373868B2 Method of processing a porous conductive structure in connection to an electronic component on a substrate Electricity 0 Active
US9786568B2 Method of manufacturing an integrated circuit substrate Electricity 0 Active
US11488921B2 Multi-chip device, method of manufacturing a multi-chip device, and method of forming a metal interconnect Electricity 0 Active
US10269635B2 Integrated circuit substrate and method for manufacturing the same Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.