Forming on-chip metal-insulator-semiconductor capacitor
US9899372B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2016 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Nov 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is presented for forming a semiconductor structure. The method includes forming a plurality of fins on a first region of the semiconductor substrate, forming a bi-polymer structure, selectively removing the first polymer of the bi-polymer structure and forming deep trenches in the semiconductor substrate resulting in pillars in a second region of the semiconductor structure. The method further includes selectively removing the second polymer of the bi-polymer structure, doping the pillars, and depositing a high-k metal gate (HKMG) over the first and second regions to form the MIS capacitor in the second region of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.