Distribution of tasks among asymmetric processing elements
US9910483B2 · kind B2 · utility
1Cited by
45References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2014 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Jan 14, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.