Patent · US Active

Method for manufacturing microelectromechanical structures in a layer sequence and a corresponding electronic component having a microelectromechanical structure

US9932223B2 · kind B2 · utility

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13Claims
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Key dates

Filing dateApr 13, 2016
Grant dateApr 3, 2018
Priority date
Expiry dateApr 13, 2036

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB81C2201/014
  • WIPO fieldMicro-structural and nano-technology
  • WIPO sectorChemistry

Abstract

A method for manufacturing microelectromechanical structures in a layer sequence and a corresponding electronic component having a microelectromechanical structure. The method includes provision of a carrier substrate including a first surface, an application of an insulation layer onto the first surface, an epitaxial growth of a first silicon layer onto the insulation layer, a structuring of the first silicon layer for forming trenches in the first silicon layer, a passivation of the first silicon layer, whereby the trenches are filled and a passivation layer is formed on a side facing away from the first surface, a structuring of the passivation layer, sacrificial areas and functional areas being formed in the first silicon layer, and the sacrificial areas are free of the passivation layer, at least at some points, on a side facing away from the carrier substrate, and, finally, removal of the sacrificial areas.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.