Patent · US Active

Nonvolatile semiconductor memory device having electron scattering and electron accumulation capacities in charge accumulation layer

US9935122B2 · kind B2 · utility

1Cited by
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14Claims
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Assignee

Inventors

Key dates

Filing dateMar 16, 2016
Grant dateApr 3, 2018
Priority date
Expiry dateMar 16, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/685

Abstract

A nonvolatile semiconductor memory device according to an embodiment comprises a memory cell, the memory cell comprising: a semiconductor layer; a control gate electrode; a charge accumulation layer disposed between the semiconductor layer and the control gate electrode; a first insulating layer disposed between the semiconductor layer and the charge accumulation layer; and a second insulating layer disposed between the charge accumulation layer and the control gate electrode, the charge accumulation layer including an insulator that includes silicon and nitrogen, and the insulator further including: a first element or a second element, the second element being different from the first element; and a third element different from the first element and the second element.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.