High electron mobility transistor fabrication process on reverse polarized substrate by layer transfer
US9935191B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2014 |
| Grant date | Apr 3, 2018 |
| Priority date | — |
| Expiry date | Jun 13, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76254
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method including forming a barrier layer on a polar compound semiconductor layer on a sacrificial substrate; coupling the sacrificial substrate to a carrier substrate to form a composite structure wherein the barrier layer is disposed between the polar compound semiconductor layer and the carrier substrate; separating the sacrificial substrate from the composite structure to expose the polar compound semiconductor layer; and forming at least one circuit device. An apparatus including a barrier layer on a substrate; a transistor device on the barrier layer; and a polar compound semiconductor layer disposed between the barrier layer and the transistor device, the polar compound semiconductor layer including a two-dimensional electron gas therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.