Systems and methods for migrating processes among asymmetrical processing cores
US9939882B2 · kind B2 · utility
1Cited by
45References
6Claims
0Family size
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Key dates
| Filing date | Jul 31, 2013 |
| Grant date | Apr 10, 2018 |
| Priority date | — |
| Expiry date | Oct 16, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques to control power and processing among a plurality of asymmetric processing elements are disclosed. In one embodiment, one or more asymmetric processing elements are power managed to migrate processes or threads among a plurality of processing elements according to the performance and power needs of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.