Patent · US Active

Accessing data in multi-dimensional tensors using adders

US9946539B1 · kind B1 · utility

8Cited by
5References
20Claims
0Family size

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Key dates

Filing dateMay 23, 2017
Grant dateApr 17, 2018
Priority date
Expiry dateMay 23, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/454
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods, systems, and apparatus, including an apparatus for accessing a N-dimensional tensor, the apparatus including, for each dimension of the N-dimensional tensor, a partial address offset value element that stores a partial address offset value for the dimension based at least on an initial value for the dimension, a step value for the dimension, and a number of iterations of a loop for the dimension. The apparatus includes a hardware adder and a processor. The processor obtains an instruction to access a particular element of the N-dimensional tensor. The N-dimensional tensor has multiple elements arranged across each of the N dimensions, where N is an integer that is equal to or greater than one. The processor determines, using the partial address offset value elements and the hardware adder, an address of the particular element and outputs data indicating the determined address for accessing the particular element of the N-dimensional tensor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.