Methods for gate formation in circuit structures
US9947545B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Feb 21, 2017 |
| Grant date | Apr 17, 2018 |
| Priority date | — |
| Expiry date | Mar 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for forming a gate structure of a circuit structure are provide. The methods for forming the gate structure may include: forming a first gate pattern in a gate mask layer, the forming including a first etching of rounded corner portions of the first gate pattern; forming a second gate pattern in the gate mask layer, the second gate pattern at least partially overlapping the first gate pattern, the forming including a second etching of rounded corner portions of the second gate pattern; and, etching the gate mask layer using the first gate pattern and second gate pattern to form the gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.