Device with diffusion blocking layer in source/drain region

US9947788B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Shesh Mani Pandey · Saratoga Springs, US
• Pei Zhao · Clifton Park, US
• Baofu Zhu · Clifton Park, US
• Francis Benistant · Singapore, SG

Key dates

• Filing date: Feb 9, 2016
• Grant date: Apr 17, 2018
• Expiry date: Feb 9, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8325

Abstract

A method includes forming a gate electrode structure above a channel region defined in a semiconductor material. The semiconductor material is recessed in a source/drain region. A first material is epitaxially grown in the source/drain region. The first material includes a dopant species having a first concentration. A diffusion blocking layer is formed in the source/drain region above the first material. A second material is epitaxially grown in the source/drain region above the diffusion blocking layer. The second material comprises the dopant species having a second concentration greater than the first concentration.