Semiconductor structure with self-aligned wells and multiple channel materials
US9953872B2 · kind B2 · utility
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8Claims
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Key dates
| Filing date | Sep 8, 2017 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | Sep 8, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0151
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide a semiconductor structure having a strain relaxed buffer, and method of fabrication. A strain relaxed buffer is disposed on a semiconductor substrate. A silicon region and silicon germanium region are disposed adjacent to each other on the strain relaxed buffer. An additional region of silicon or silicon germanium provides quantum well isolation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.